The invention relates generally to memory modules for computer systems. More particularly, the invention relates to techniques for system level negotiation of an operating mode of a memory module by dynamic control of the presence detect data.
Computer memory comes in two basic forms: Random Access Memory (hereinafter RAM) and Read-Only Memory (hereinafter ROM). RAM is generally used by a processor for reading and writing data. RAM memory is volatile typically, meaning that the data stored in the memory is lost when power is removed. ROM is generally used for storing data which will never change, such as the Basic Input/Output System (hereinafter BIOS). ROM memory is non-volatile typically, meaning that the data stored in the memory is not lost even if power is removed from the memory.
Generally, RAM makes up the bulk of the computer system""s memory, excluding the computer system""s hard-drive, if one exists. RAM typically comes in the form of dynamic RAM (hereinafter DRAM) which requires frequent recharging or refreshing to preserve its contents. Organizationally, data is typically arranged in bytes of 8 data bits. An optional 9th bit, a parity bit, acts as a check on the correctness of the values of the other eight bits.
As computer systems become more advanced, there is an ever increasing demand for DRAM memory capacity. Consequently, DRAM memory is available in module form, in which a plurality of memory chips are placed on a small circuit card, which card then plugs into a memory socket connected to the computer motherboard or memory carrier card. Examples of commercial memory modules are SIMMs (Single In-line Memory Modules) and DIMMs (Dual In-line Memory Modules).
In addition to an ever increasing demand for DRAM capacity, different computer systems may also require different memory operating modes. Present memories are designed with different modes and operational features such as fast page mode (FPM), extended data out (EDO), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), parity and non-parity, error correcting (ECC) and non error correcting, to name a few. Memories also are produced with a variety of performance characteristics such as access speeds, refresh times and so on. Further still, a wide variety of basic memory architectures are available with different device organizations, addressing requirements and logical banks. As a result, some memory modules may or may not have features that are compatible with a particular computer system.
In order to address some of the problems associated with the wide variety of memory chip performance, operational characteristics and compatibility with system requirements, memory modules are being provided with presence detect (PD) data. PD data is stored in a non-volatile memory such as an electrically erasable programmable read-only memory (EEPROM) on the memory module. A typical PD data structure includes 256 eight bit bytes of information. Bytes 0 through 127 are generally locked by the manufacturer, while bytes 128 through 255 are available for system use. Bytes 0-35 are intended to provide an in-depth summary of the memory module architecture, allowable functions and important timing information. PD data can be read in parallel or series form, but serial PD (SPD) is already commonly in use. SPD data is serially accessed by the system memory controller during boot up across a standard serial bus such as an I2C(trademark) bus (referred to hereinafter as an I2C controller). The system controller then determines whether the memory module is compatible with the system requirements and if it is will complete a normal boot. If the module is not compatible an error message may be issued or other action taken.
It is desired, therefore, to provide a memory module that is more flexible in terms of its compatibility with different computer systems, and particularly that permits the computer system dynamically to negotiate available memory module functions and modes.
The present invention contemplates, in one embodiment, a memory module comprising: a plurality of memory chips on the module; first logic for configuring the memory module to operate in a selectable mode; second logic for storing initial presence detect (PD) data; and third logic for storing modified PD data that corresponds to a requested mode of operation of the memory module received from a system controller.
The invention also contemplates the methods embodied in the use of such a memory module, and in another embodiment, a method for system control of an intelligent-memory module, including the steps of:
a) reading initial presence detect (PD) data from a non-volatile memory on the memory module;
b) writing modified PD data to a volatile memory based on requested operating mode; and
c) controlling transfer of the modified PD data between the memory module and a system controller based on which memory stores up-to-date PD data.
These and other aspects and advantages of the present invention will be readily understood and appreciated by those skilled in the art from the following detailed description of the preferred embodiments with the best mode contemplated for practicing the invention in view of the accompanying drawings.